There are many different types of memory used in electronics today, including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory. Flash memory devices typically use transistor memory cells that allow for high memory densities, high reliability, and low power consumption and may be provided with different logic interfaces.
One of the more widely used flash memories is NAND flash memory. NAND flash memory has pushed density among the commercial memories through its excellent physical scalability and multi-level cell (MLC) approach. Demand has recently spiked for higher density, faster speed, and lower cost NAND flash memories in portable electronics. Reducing the size of the memory cell may be useful to meet this need.
Planar NAND cell scaling below 20 nm is extremely challenging due to interference between cells. However, the use of vertical 3D NAND strings allows further “bit-cost” scaling. Several 3D NAND schemes have been proposed, such as vertical gate (VG) NAND, pipe-shaped bit cost scalable (P-BiCS) NAND, and terabit cell array transistor (TCAT).
The above schemes use polycrystalline-silicon (poly-silicon) channel material. Depending on deposition conditions, e.g., temperature, pressure, and deposition method, thin-film transistor (TFT) performance may be significantly degraded when poly-silicon material is used (e.g., as compared to crystalline-Si material) due to defect traps and grain boundaries in poly-silicon film. To help solve this problem, hydrogenation may be used to address issues where insufficient hydrogen occurs in the polycrystalline grain boundaries.
Hydrogenation may be used to passivate the defect traps and improve the electrical characteristics of poly-silicon TFTs. Through hydrogenation, hydrogen atoms bond with silicon dangling bonds at the grain boundary and gate oxide/Si interface to passivate the defect traps. Several hydrogenation methods have been employed for poly-silicon TFTs. However, each has strengths and weaknesses. An annealing process is performed at 350-400° C. Annealing in a forming gas (H2+N2), however, suffers from very low hydrogen ion molecular diffusivity and hydrogen ion gradient.
Accordingly, new passivation and annealing techniques that can be used to address grain boundary defects that influence Vt, as well as the sub-threshold slope and intra-granular defects that influence mobility and leakage current, are desired.